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外企内推职位 [复制链接]

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注册:2022-9-23
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发表于 2023-3-24 13:26:26 |只看该作者 |倒序浏览
技术招聘
公司名称: 索雷博光电科技(上海)有限公司
职位名称: FPGA开发工程师
工作岗位: 产品研发
所在地区: 上海 » 不限
专业要求: 不限
性别要求: 不限
学历要求: 本科
职位性质: 全职
薪酬待遇: 20000~29999 月
工作经验: 五年以上
联系人: HR
联系电话: 18502173281
email: 1079494474@qq.com
Thorlabs, a vertically integrated photonics products manufacturer serving the laser and electro-optics research market, is seeking a talented, experienced FPGA design and verification engineer. This position will be located in the Thorlabs R&D center in Shanghai, China, and lead the development and commercialization of  a variety of FPGA-based high-speed electronic designs for Thorlabs products.
Thorlabs是一家垂直整合光子学产品制造商,服务于激光和光电研究市场,现招聘有才华、经验丰富的FPGA设计和验证工程师。该职位工作地点位于索雷博上海的研发中心,负责公司产品中一系列基于FPGA的高速电子设计的开发和量产支持。

Responsibilities:
1.        Design and support of FPGA-based solutions for electro-optical systems.
完成基于FPGA的光电模块和产品的开发和技术支持工作
2.        FPGA programming in VHDL and/or Verilog; Participates in cross-functional new product development teams as an FPGA/Digital electronics design expert.
使用 VHDL和/或Verilog进行FPGA开发;在跨专业和部门的产品开发团队中承担FPGA和数字电子设计工作
3.        Development of FPGA including coding, simulation, synthesis, test and functional verification, timing closure, and documentation. Emphasis on high-speed hardware data path, memory controllers, USB3, SerDes and PCIe interface.
具体的FPGA开发工作包括:编码,仿真,综合,测试,功能验证,时序收敛,编写文档。工作内容包括高速数字电路、存储控制器、USB3控制器、PCIe接口等设计工作
4.        Support electronic and electrical component, circuit, and board design for high-speed digital systems.
配合完成高速数字系统的电子电气元件选型、验证、电路和电路板设计
5.        Participate in lab testing of prototype imaging equipment and address FPGA performance improvements.
配合进行成像系统设备的实验室调试测试工作

Knowledge and Skills:
1.        Demonstrated strong VHDL and/or Verilog skills; logical and physical design, timing closure.
精通VHDL和/或Verilog开发,数字逻辑电路设计,时序收敛技巧
2.        Implementations of high-speed (GHz) SerDes, DDR3, FFT, digital filtering, and interfacing with AD/DA, camera chips, etc. Using logic design techniques.
能够基于FPGA实现高速(GHz) SerDes, DDR3控制器, FFT算法,数字滤波器,AD/DA接口,图像传感器接口等等
3.        Solid understanding of data movement and AXI interfaces; Experience with High-speed serial interface IPs (e.g. PCIe interface, contemporary high speed ADC/DAC interfaces, DDR3, etc.).
精通数据传输和接口技术,如AXI接口,高速数据接口(比如PCIe接口,高速AD/DA接口,DDR3接口)
4.        Familiarity with high-speed (GHz) PCB design techniques
熟悉高速 (GHz) PCB 设计技术
5.        Demonstrated ability to bring FPGA subsystem from concept through release to manufacturing
能够完成FPGA子系统的概念设计到量产发布全过程相关工作(包括原理样机、工程样机、量产产品定型等)
6.        Working knowledge of signal processing algorithms, host architectures, and host data storage devices and optimization techniques
熟悉信号处理算法、数字电路产品架构、数据存储产品、各种优化技能
7.        Experience with laboratory instrumentation such as function generators, oscilloscopes, network analyzers, and logic analyzers
熟练使用各种实验室设备,包括函数发生器、示波器、网络分析仪和逻辑分析仪
8.        Design for Test and Manufacturability
熟悉面向测试和生产的设计,保证产品具备良好的可测试性、可制造性
9.        Board-level, production test development and implementation
能够对电路板、模块、整机进行测试、调试、改进
10.        Excellent communication skills in verbal and written English
英语口语和书面表达流利
11.        Strong ability to work well in a group atmosphere, and comply with high-quality standards
能够参与团队合作,服从团队需要,高质量地实现团队目标
12.        Experience with Xilinx (Zynq) and/or Altera SOC products and development tools.
具有Xilinx (Zynq) 和/或 Altera SOC 产品和开发工具的使用经验
13.        Experience with implementation and optimization of Image processing algorithms in FPGA logic.
具有在FPGA上实现和优化图像处理算法的经验
14.        Mixed Signal PCB design is a plus.
熟悉混合信号PCB设计者优先

Education and Experience:
1.        Minimum Bachelor’s degree or equivalent in Electrical Engineering
电气工程专业最低学士学位或同等学历
2.        Minimum 5 years of FPGA design experience
至少5年FPGA设计经验

Compensation and Benefits
薪酬福利
1. Base salary based on his/her role, individual performance and competencies, as well as market competitiveness
依据个人绩效和能力提供具有市场竞争力的薪资
2. Mandatory social insurance and housing fund in accordance with PRC Laws.
根据国家规定缴纳五险一金
3. Optional supplementary medical insurance
员工可自愿选择参加高端医疗保险
4. Annual medical check-up
每年一次的健康体检
5. 10-15 days of annual leave days per calendar year
每年10至15天年假

简历投递:mhu@thorlabs.com 备注通信论坛+应聘职位+姓名

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